Time-Domain Resource Allocation & SLIV in 5G NR

1. Why NR Lets the Time Domain Float

In LTE, a downlink assignment told the UE which resource blocks to receive and said nothing whatsoever about when. It did not need to. A PDSCH occupied one subframe, beginning immediately after the control region and ending at the last symbol, and every transmission in the cell shared that 1 ms cadence. The transmission time interval was a constant of the system. That constant bought enormous simplification -- and it put a floor of roughly 1 ms under every latency budget, and a ceiling of one subframe over every energy accumulation.

NR removed the constant. The start symbol and the length became fields in a grant, selected from a table the network configures. Everything in this document exists because of that one decision, and the decision was driven by two requirements pulling in opposite directions:

• Latency. A URLLC transmission wants to start at the next symbol boundary after the grant is decoded, not at the next slot boundary, and it wants to be short enough that the receiver can decode it and turn around inside a millisecond. Two symbols at 30 kHz SCS is about 71 µs. Waiting for a slot boundary would add up to 500 µs of pure dead time to a budget measured in single milliseconds.
• Coverage. A cell-edge UE wants the opposite: every symbol in the slot, all fourteen of them, because received energy is the only thing standing between it and a decoding failure. It would happily take several slots' worth (§14), and it certainly does not want the scheduler wasting three symbols at the top of the slot on a control region it is not using.

One frame structure has to serve both, in the same cell, in adjacent slots, on the same carrier. The mechanism NR chose is to make the time-domain allocation a per-grant pair of integers, and then to spend considerable specification effort making that pair cheap to signal. The cheapness is the SLIV.

Table 1. What NR gave up and what it bought. The right-hand column is this document; the companion 02 Radio Frame Structure document owns the slot and symbol numbering both columns assume.

2. S and L: What the Scheduler Actually Chooses

The definitions are short and worth stating exactly, because almost every hand-decoding error is a definitional one rather than an arithmetic one TS 38.214 cl. 5.1.2.1:

Table 2. S and L, for normal cyclic prefix. For extended CP the slot has 12 symbols and the constraint becomes S + L <= 12; see §3.

Three properties of this pair matter more than they look:

• The allocation is contiguous in time. There is no bitmap, no gap, no comb. This is the opposite of the frequency domain, where FDRA type 0 is an RBG bitmap and a single grant can be scattered across the carrier. In time you get one run of symbols, full stop.
• The allocation cannot cross a slot boundary. S + L <= 14 is not a convenience, it is structural: the DMRS position, the HARQ process association and the transport block are all defined per slot. A transmission that needs more symbols than the slot has left uses repetition (§14, §15), which is several transmissions, not one long one.
• Neither S nor L says anything about which slot. The SLIV is purely intra-slot. The slot is chosen by k0 or k2 (§11), and the two pieces of information travel together in the same table row but are encoded completely separately.

3. The SLIV Encoding, and Why It Is Piecewise

The encoding is specified in the forward direction only, as two branches TS 38.214 cl. 5.1.2.1:

SLIV encoding, normal cyclic prefix:

    if (L - 1) <= 7:
        SLIV = 14 * (L - 1) + S
    else:
        SLIV = 14 * (14 - L + 1) + (14 - 1 - S)

    subject to   L >= 1   and   S + L <= 14

  S     starting symbol index within the slot, counted from 0
  L     number of consecutive symbols, counted from S inclusive
  SLIV  the value carried in startSymbolAndLength, INTEGER (0..127)

The obvious question is why this is not simply SLIV = 14 * L + S, which would be a clean two-field pack and would need eight bits. The answer is that half of the (S, L) rectangle is not merely unused but illegal, and the fold reuses it.

3.1 Counting the legal pairs

For each length L there are exactly 15 − L legal starting positions, because S may run from 0 up to 14 − L inclusive. Summing over all lengths:

3.2 What the fold does

Branch 1 lays lengths L = 1 through 8 out in rows of 14, in the natural order: L = 1 occupies SLIVs 0 to 13, L = 2 occupies 14 to 26, and so on. Each of those rows is short -- L = 2 only has 13 legal starting positions, so SLIV 27 would be the next value in the row if it existed, and it does not. Those leftover values at the end of each row are precisely where branch 2 puts the long allocations, in reverse order of both L and S. L = 14 has exactly one legal pair and it lands on SLIV 27, the hole at the end of the L = 2 row. L = 13 has two, and they land on 40 and 41, the holes at the end of the L = 3 row.

That is the whole trick, and it is why the second branch has the shape it does. The (14 − L + 1) term walks the rows backward from the top; the (14 − 1 − S) term walks the positions backward within a row, so that the shortest legal run of positions is packed against the far end. Read the next section's figure once and the formula stops needing to be remembered.

4. The Encoding Space, Seen Whole

This is the figure worth spending a minute on. It is the entire encoding, drawn once: the 14 × 14 rectangle of (S, L) pairs, the legal triangle in the lower left, the illegal triangle in the upper right, and the fold between L = 8 and L = 9 where the branch changes.

4.1 Reading the figure

• Bottom row, L = 1. Fourteen legal pairs, SLIVs 0 to 13, one per starting symbol. This row exists but is not usable for PDSCH -- neither mapping type permits L = 1 for PDSCH (§10). PUSCH mapping type B does.
• Below the fold (L = 1 to 8). SLIV increases left to right and jumps by 14 per row. SLIV mod 14 is S and SLIV div 14 is L − 1. Simple.
• Above the fold (L = 9 to 14). SLIV increases right to left, and the rows are stacked in reverse. The single cell at L = 14, S = 0 is SLIV 27, sitting in the hole after SLIV 26.
• The upper-right triangle. 91 illegal pairs, no code point. This is where the 105 values fit into a 7-bit field instead of an 8-bit one.

4.2 Working the encoding forward

Four encodes, chosen so that two land in each branch. These are the values that appear in every trace and figure in this document:

5. Decoding a SLIV: the Algorithm and Its One Trap

The spec gives the encoder. Everyone reading a log needs the decoder, and the decoder is not stated anywhere -- it has to be inverted. The inversion is easy but the branch selection is not obvious, because the branch condition in the encoder is on L, and L is exactly what you do not have yet.

The resolution is to assume branch 1, compute the pair it implies, and test that pair for legality. If it is legal, it is the answer, because the encoding is injective. If it is not legal, branch 2 was used:

SLIV decoding, normal cyclic prefix:

    q  = SLIV div 14                 # integer division
    r  = SLIV mod 14

    L' = q + 1                       # what branch 1 would have meant
    S' = r

    if S' + L' <= 14:                # branch 1 was used
        S = S'
        L = L'
    else:                            # branch 2 was used
        L = 15 - q                   #  = 14 - q + 1
        S = 13 - r                   #  = 14 - 1 - r

    allocation occupies symbols S, S+1, ... , S+L-1

5.1 Working the encoding backward

5.2 The round trip

A decode is worth nothing unless it re-encodes to the value you started from. This is free to check and it catches every branch error:

6. Where the SLIV Lives: the TDRA Row and the List

A SLIV never travels alone. It is one field of a three-field structure that also carries the slot offset and the mapping type, and that structure is one entry in a configured list. The DCI selects a list entry; the entry carries everything needed to place the transmission.

Table 3. One row of PDSCH-TimeDomainResourceAllocation or PUSCH-TimeDomainResourceAllocation. The three fields are independent: the same SLIV with a different k0 is a different transmission, and the same SLIV with a different mappingType is a different channel structure even though it occupies identical symbols.

6.1 The lists, and which one wins

The rows are gathered into pdsch-TimeDomainAllocationList and pusch-TimeDomainAllocationList, each of up to 16 entries in Rel-15 (maxNrofDL-Allocations and maxNrofUL-Allocations are both 16). Each list can appear in two places, and there is a strict precedence TS 38.214 cl. 5.1.2.1.1 and 6.1.2.1.1:

Table 4. Precedence for resolving a TDRA index. Note that a dedicated list, once present, generally displaces the common one even for common-search-space grants -- which is why an RRC reconfiguration can change the meaning of a DCI field value without the field itself changing.

7. The DCI Field Is an Index, Not a SLIV

This is the piece of the mechanism that most often surprises people reading a DCI dump: the Time domain resource assignment field in a scheduling DCI does not contain a SLIV, does not contain S, does not contain L, and does not contain k0 or k2. It contains a row number.

Table 5. TDRA field widths, TS 38.212 cl. 7.3.1.1.2 and 7.3.1.2.2. The companion 08 Scheduling document covers the rest of each DCI format's field set; this table covers only the one field.

7.1 The off-by-one that catches everybody

TS 38.214 phrases the lookup as "the row index m + 1", where m is the value of the TDRA field. The field is zero-based; the tables in the spec are one-based. Field value 0 selects row 1. Field value 15 selects row 16. Most vendor logs print the field value, some print the row number, and a few print both with the same label.

8. The Default Tables, and Why Initial Access Needs Them

A UE performing initial access has read MIB and SIB1 and nothing else. It has to receive SIB1 itself, then the RAR, then MSG4 -- three PDSCHs and one PUSCH -- before any dedicated configuration exists. Something has to tell it where in the slot those transmissions are, and that something is a table hard-coded in TS 38.214 that both ends already know.

There are three default PDSCH tables and one default PUSCH table, each with a normal-CP and an extended-CP variant:

Table 6. The default tables and their applicability, TS 38.214 Tables 5.1.2.1.1-1 and 6.1.2.1.1-1. Which of A, B or C applies is decided by the RNTI, the search space type and the SSB-to-CORESET#0 multiplexing pattern -- the companion 30 CORESET and Search Space document owns that pattern.

8.1 A representative portion of Default PDSCH table A

This is TS 38.214 Table 5.1.2.1.1-2, Default PDSCH time domain resource allocation A for normal CP, rows 1 through 8. The table is indexed by dmrs-TypeA-Position, which is broadcast in MIB, because the start symbol of a mapping type A allocation has to contain the DMRS (§9). Every row has k0 = 0:

Table 7. Rows 1 to 8 of Default PDSCH table A, normal CP. "pos2" and "pos3" are the two values of dmrs-TypeA-Position. Rows 9 to 16 continue with further type B and type A entries; they are not reproduced here. Row 1 with dmrs-TypeA-Position = pos2 is (S = 2, L = 12) -- SLIV 53, the value worked in §4 and §5, and by a wide margin the most common allocation you will see.

9. Mapping Type A and Mapping Type B

mappingType is one enumerated bit in the TDRA row and it changes more than any other field in this document. It decides where the demodulation reference signal goes, and therefore what the receiver can do with a short allocation. Two allocations occupying byte-for-byte identical symbols behave completely differently depending on this bit.

9.1 Type A: slot-based

Mapping type A is the LTE-shaped case. The DMRS sits at a fixed position referenced to the slot boundary -- symbol 2 or symbol 3, selected by dmrs-TypeA-Position in MIB and repeated in ServingCellConfigCommon TS 38.211 cl. 7.4.1.1.2. The allocation is expected to be long, to start near the top of the slot, and to run to or near the end of it.

The restriction on S follows directly. The DMRS symbol has to be inside the allocation, and the DMRS symbol is at index 2 or 3 of the slot. If S were 5, the allocation would start three symbols after its own reference signal and the receiver would have no channel estimate. So S is capped at 3, and at 3 only when dmrs-TypeA-Position = pos3.

9.2 Type B: non-slot-based, the mini-slot

Mapping type B references the DMRS to the first symbol of the allocation, not to the slot. That single change is what makes the mini-slot possible: an allocation can begin anywhere, because it carries its own reference signal with it.

Table 8. Mapping type A against mapping type B. The overhead row is the reason mini-slots are a latency tool and not a throughput tool.

The DMRS position rules themselves -- how many additional DMRS symbols a given L gets, the dmrs-AdditionalPosition enumeration, and the configuration types 1 and 2 -- belong to the companion 33 DMRS document, which owns them. What matters here is only which reference point the mapping type selects, because that is what constrains S.

10. Valid (S, L) Combinations, and Why They Are Restricted

The SLIV encoding can express all 105 pairs. The spec then forbids most of them, per channel and per mapping type, in TS 38.214 Table 5.1.2.1-1 for PDSCH and Table 6.1.2.1-1 for PUSCH. A SLIV whose (S, L) is outside the applicable row of those tables is not merely unusual -- the UE is not required to receive it, and behaviour is undefined.

Table 9. Valid S and L, TS 38.214 Table 5.1.2.1-1 (PDSCH) and Table 6.1.2.1-1 (PUSCH). For PDSCH type A, S = 3 is applicable only when dmrs-TypeA-Position = pos3.

10.1 Reading the four asymmetries

• PDSCH type A: S is capped at 3. Because the DMRS is at slot symbol 2 or 3 and must be inside the allocation (§9.1). Nothing else constrains it.
• PDSCH type A: L starts at 3. A two-symbol slot-based PDSCH would spend a symbol on DMRS and have one symbol of data starting at the top of the slot -- there is no use case, and type B covers short allocations properly.
• PDSCH type B: L is drawn from {2, 4, 7} only. This is the restriction people trip over. It is not a range, it is a set. L = 3, L = 5, L = 6 and everything above 7 are not legal Rel-15 type B PDSCH lengths. The three values were chosen to cover a symbol pair, a quarter slot and a half slot; later releases widen the set for specific features, so confirm against the release and the UE capability before assuming a value is available.
• PUSCH type A: S = 0, full stop. An uplink slot-based transmission always starts at the first symbol of the slot. There is no uplink control region to skip, so there is nothing for a nonzero S to buy. Meanwhile PUSCH type B is the least restricted case in the whole table: any S from 0 to 13, any L from 1 to 14. A single-symbol PUSCH is legal and is used for very short uplink control-plus-data bursts.

11. k0, k2, and the Processing-Time Floors

The SLIV places a transmission within a slot. k0 and k2 say which slot, counted forward from the slot in which the scheduling DCI was received:

Table 10. The two slot offsets, TS 38.214 cl. 5.1.2.1 and 6.1.2.1. k1 -- PDSCH to HARQ feedback -- is a third offset of the same family and belongs to the companion 05 HARQ document.

11.1 Why k2 cannot be small

k0 may be zero because the gNB knows in advance what it is going to transmit; it can prepare the PDSCH and the PDCCH in the same slot. k2 cannot, because between the DCI and the PUSCH the UE has to blind-decode the PDCCH, parse the DCI, look up the TDRA row, assemble a MAC PDU, encode it and get it to the transmitter. That interval has a hard floor called N2, the PUSCH preparation time, and its downlink counterpart N1 bounds k1 the same way.

Table 11. UE processing capability 1, front-loaded DMRS only, from TS 38.214 Table 5.3-1 and Table 6.4-1. Capability 2 (processingType2Enabled) roughly halves these. The companion 05 HARQ document owns N1, N2 and the timing-capability negotiation; these values are reproduced here only because they bound k2.

There is a second floor on k2 that has nothing to do with processing time: the target slot has to actually contain uplink symbols. In a TDD cell the scheduler is choosing from a sparse set of candidate slots, and that is §13.

12. A Full Worked Chain: DCI to Absolute Symbols

Everything above assembles into a five-step lookup. This is the chain to run in your head, or on paper, whenever a log gives you a TDRA field value and you need to know what actually happened on the air: